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Registration is Open for Microchip MASTERs 2019!

Phoenix, Arizona, August 7-10, 2019 (Pre-conference August 5-6) Register Here or Watch What Happened at Last Year's Premier Technical Training Conference for Embedded Control Engineers

Safety, Comfort and Control

Thermal Management Products for Every Environment

One Development Environment—All Solutions

MPLAB® Ecosystem is Comprehensive, Powerful and Simple

Find a product

Looking for a part or a development tool We offer a variety of ways to find the solution you need.

Explore an application

Want to see an easy way to get there From key functions to full applications, let us show you the way.

Start developing

Compilers, programmers, debuggers, code configurators, analog design tools and more. We have everything you need to get started.

Registration Is Open for Microchip MASTERs 2019

Register today for the premier technical training conference for embedded control engineers. Classes are taught by the same application and design engineers who create the products, which offers an amazing engineer-to-engineer experience. This world-class event offers training at all skill levels plus networking opportunities, an exhibitor lobby, opportunities to meet with Microchip engineers and much more.

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Next-Generation Portable Ultrasound

Are you developing a portable, medical ultrasound platform Our IC solutions allow you to significantly shrink the size of your ultrasound scanner while maintaining the ability to deliver high-quality images. By offering a full portfolio of high-voltage (HV) ultrasound products—including high-density HV analog switches and highly integrated HV transmitters—we can help you implement a full system solution backed by the support of our knowledgeable application and solution engineers.

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Perfect Timing

As increasing data rates continue to shrink jitter budgets, our new clock buffers will minimize jitter when your design calls for distributing timing to as many as 20 outputs. They meet the PCI Express® (PCIe® ) Gen 4 and the presently-defined PCIe Gen 5 jitter specifications, as well as the DB2000Q standard for network servers. For power savings, these clock buffers implement Low-Power High-Speed Current-Steering Logic (LP-HCSL), which reduces power consumption by a third as compared to standard HCSL. Not only do they allow you to drive longer traces on your board to improve signal routing, they also reduce the number of components needed in your design, which also reduces your board size and costs.

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Press Releases

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